The present application is directed to electronic lighting systems, and more particularly to an integrated bridge inverter circuit used in connection with a discharge lamp.
Existing single-stage high-power factor electronic ballasts designed for discharge lamps, such as integral compact fluorescent lamp applications, have various drawbacks including an undesirably limited zero-voltage switching range, a high unnecessary component stress during operation and starting. Existing systems also have undesirably high crest factors and high harmonics' content, which prevents products from compliance with International Electro-technical Commission (e.g., IEC-61000-3-2) standards. Such lamps are also bulky and limit its usage in space sensitive applications.
One existing electronic ballast which may be used for discharge lamps is a self-oscillating high-power factor electronic ballast as taught by Wong, U.S. Pat. No. 5,426,344. The Wong circuit, and other ballasts in the art, use input bridge circuit portions and inverter circuit portions which are distinct and separate from each other. The Wong approach produces a crest factor of 2.0 or higher. The crest factor, alternately referred to as peak-to-RMS (Root Mean Square) ratio is a measurement of a waveform, calculated from the peak amplitude of the waveform divided by the RMS value of the waveform. Crest factor is a parameter that has direct impact on a lamp's life.
A disadvantage of the Wong approach is it produces a high bus-voltage stresses, such as the voltage across a capacitor, which requires use of high voltage-rated transistors. A further disadvantage of the Wong approach is it requires a large EMI filter to moderate the discontinuous nature of the input current existing prior to the input diode bridge. The high-peak currents, which have higher high frequency current content, need to be filtered out by the input EMI filter. A further disadvantage of existing ballasts such as Wong et al., is a high current stress on the switch transistors and resonant components.
Another related patent is Chen, U.S. Pat. No. 6,417,631 by the same first inventor. This topology has eliminated many prior single stage power factor correction (PFC) circuit drawbacks, however, it still uses a larger number of components than a conventional compact fluorescent lamp (CFL), and requires the use of more expensive FET switches.